Semiconductor devices are commercially well-established as active components in computing and communications equipment where they may serve, e.g., as gates and switches and as sources, modulators, and amplifiers of radio frequency radiation. Among semiconductor devices for radio frequency application are devices generally known as metal-semiconductor field effect transistors (MESFET) which are being used, e.g., as microwave amplifiers on account of their capability to operate at relatively high frequencies and power levels and their low noise output. The basic structure of MESFETs is well known in the art of semiconductor devices and is described, e.g., in the book by S. M. Sze, Physics of Semiconductor Devices, Wiley-Interscience, 1969. Specifically, on page 411 of the book by Sze, a basic device structure is shown to encompass a semi-insulating substrate on which an n-type semiconducting epitaxial layer is deposited. Three contacts are deposited on the semiconducting layer, namely, a first ohmic contact acting as a negative source contact, a Schottky barrier contact acting as a gate contact, and a second ohmic contact acting as a positive drain contact.
A more elaborate device structure is disclosed in U.S. Pat. No. 4,196,439, issued April 1, 1980 to W. C. Niehaus et al. There, a more heavily doped layer is situated between the active layer and the ohmic contacts and, moreover, the more heavily doped layer extends past an edge of the drain contact. The gate contact typically is placed in a notch in the active layer and, according to allowed U.S. Pat. No. 4,300,148, issued Nov. 10, 1981 to W. C. Niehaus et al., notch depth can be chosen so as to minimize a detrimental phenomenon known as gate-drain avalanche.
While it is possible to have electrical leads to contacts all on the free side of the active layer, an alternate, so-called source-via design provides for a source contact to be connected through the active layer and the substrate as disclosed in U.S. Pat. No. 3,986,196, issued Oct. 12, 1976 to D. R. Decker et al. The manufacture of devices based on this design is facilitated by a plasma-etching technique as disclosed by L. A. D'Asaro et al., "Plasma-Etched Via Connections to GaAs FET's, Institute of Physics Conference Series, No. 56, Chapter 5, pp. 267-273 (1981).
Source-via devices are considered to be particularly suitable for high-frequency applications where low source inductance is beneficial. A similar benefit may be realized by a so-called flip-chip design as considered, e.g., by Y. Mitsui et al., "10-GHz 10-W Internally Matched Flip-Chip GaAs Power FET's", IEEE Transactions on Microwave Theory and Techniques, Vol. MTT-29, No. 4, April 1981, pp. 304-309.
In the interest of optimum usage of a semiconductor chip, devices are being designed in which gate and drain contacts form comb-like patterns which are placed in an interdigitated fashion. Such devices are considered by A. Higashisaka et al., "A High-Power GaAs MESFET with an Experimentally Optimized Pattern", IEEE Transactions on Electron Devices, Vol. ED-27, No. 6, June 1980, pp. 1025-1029 and by W. R. Frensley et al., "Effect on Gate Stripe Width on the Gain of GaAs MESFETs", Proceedings, Seventh Biennial Cornell Electrical Engineering Conference, Cornell University, 1979, pp. 445-452.